1. Field of the Invention
This invention relates to integrated circuit semiconductor chip packages and more particularly to semiconductor chip carriers, first level electronic packages having integrated distributed high frequency decoupling capacitors as part of the package.
2. Background Information
As very large scale integrated (LSI) circuits tend to get more complex, there is a need to switch more output driver circuits simultaneously at a faster rate in order to increase the performance thereof. This increase in the switching rate results in an increase in the amount of electrical noise which is associated therewith. Various techniques have been utilized in the art to minimize the level of noise associated with the increase in the magnitude of the switching rate. One known technique for reducing the level of noise is to incorporate discrete capacitors as a decoupling capacitor between associated voltage pins. Generally, the discrete capacitor, which is mounted a distance away from the semiconductor chip, is electrically coupled thereto by a plurality of power wiring lines or large power buses. These power wiring lines typically represent high inductance paths. Moreover, as the amount of current flowing in the plurality of wiring lines increases, a voltage drop develops thereacross. The voltage drop is viewed as unwanted power distribution noise. One technique of minimizing the effective inductance of the power paths is to move the discrete capacitor as close to the semiconductor chip as possible. However, in view of either the layout of the wiring lines associated with the semiconductor chip or the physical dimensions of the discrete capacitor, the discrete capacitor cannot be positioned such that there is no voltage drop or noise. Additionally, the discrete capacitors used for this purpose are usually high frequency, low inductance capacitors which increase the cost associated with the use of this technique. The level of noise created by the increase in the rate which the current switches will limit the performance and the number if LSI circuits which can be switched simultaneously.
Consequently, there is a need for a technique for reducing the noise associated with the increase in the rate which the current switches while minimizing the inductance paths and the cost associated therewith.